(U) The goals of this subthrust are to permit increased space system affordability, reliability, operability, and autonomy by developing high-performance, low-cost space electronics that satisfy customer requirements. These goals will be achieved by:
(U) The areas (and high-level goals) that make up the Electronics subthrust are:
1. (U) Packaging and Integration: focuses primarily on advanced packaging and high-density interconnect technologies as well as demonstrations of the benefits accrued from employing these technologies.
2. (U) Wafer Scale Integration/Advanced Packaging (WSI/AP): focuses on substrates, circuits, and packaging structures for advanced microelectronics that are inherently space qualifiable. The goal is to provide dramatic reductions in size, weight, cost, and potentially power consumption, while improving performance and reliability. One part of the work has targeted the development of a low-cost 3-D packaging system that has a 10X-50X density improvement over ordinary SEM-E boards. This approach, referred to as Highly Integrated Packaging and Processing (HIPP), is compatible with the unique thermal management problems in spacecraft, as well as the need to minimize contribution to spacecraft contamination through outgassing products in modern packaging materials. Since it has been impossible to provide an all-radiation hard parts strategy to USAF spacecraft due to sheer cost limitations, more efficient shielding approaches are under research that directly integrates into this approach and minimizes added mass per component on a subsystem basis. Cost reduction in the basic substrate technologies has been found to be problematic, and significant effort has gone into developing a no-compromise substrate technology with half the weight and one-fifth the cost of previous approaches. Our efforts have led to the development of the most complex plastic high density interconnect module to date, still smaller than a postage stamp, that will be demonstrated in a NASA mission.
3. (U) Ultra High Density Interconnects (UHDI) for Space Components: as a companion effort to the more developmental packaging research, UHDI focuses on achieving wholesale density accelerations in planar packaging technology to provide 10X density improvements over basic multi-chip module (MCM) technologies as required for high capacity solid state recording applications, micro/nano-satellites, and obviously the entire base of existing space electronics research. UHDI furthermore addresses the problem associated with geometric increases in the number of conductors in newer integrated circuits. As predicted by Rent‘s rule, systems within the next decade may have components with over 5000 conductors, versus the typical 200-300 today for complex integrated circuits. The new approaches will allow be compatible with HIPP, allowing a ten-fold enhancement in density. UHDI will achieve these impressive metrics through: (1) use of improved dielectric-metal interconnections, allowing patterned overlay approaches to improve wiring density dramatically; (2) thinned semiconductors and integral passives, which will allow total assemblies to made paper thin, permitting 200 circuit layers per inch; and (3) the innovation of spanning vias that permit tremendous communications bandwidth between assembly.
|Space Mission Technology||Space Mission Technologies|
|TECHNOLOGY- RDT&E||SPACE TECHNOLOGY|
(U) National Security Space Road Map Team, NSSA, Open Phone: (703) 808-6040, DSN 898-6040.
(U) 16 July 1997
(U) Road Map Production Date: 23 June 2001